Conference Program

Remark:
Time slots of 30 minutes should be split into 25 minutes for the presentation and 5 minutes for discussion.
Time slots of 45 minutes should be split into 30 minutes for the presentation and 15 minutes for discussion.

Schedule:

09:00-09:15 Welcome Prof. Dr. Thomas Ludwig
09:15-11:00 Session 1 Chair: Thomas Ludwig
09:15-09:45
Xiaoming Du, Cong Li (Intel Corporation):
Combining Global Regression and Local Approximation in Server Power Modeling
(slides)
09:45-10:15
Thomas Ilsche (ZIH, TU Dresden, Germany), Robert Schöne, Joseph Schuchart, Daniel Hackenberg, Marc Simon, Yiannis Georgiou, Wolfgang E. Nagel:
Power Measurement Techniques for Energy-Efficient Computing: Reconciling Scalability, Resolution, and Accuracy
(slides)
10:15-11:00
Makoto Tsukakoshi (JAMSTEC, Yokohama, Japan):
"Actual FLOP/watt to evaluate total operation efficiency of computing centers" ?
(slides)
11:00-11:30 Coffee Break
11:30-13:00 Session 2 Chair: Robert Schöne
11:30-12:15
Andrey Semin (Intel Corporation):
Energy efficient hardware features of Intel Xeon processors
(slides)
12:15-13:00
Martin Schulz (LLNL, US):
Power-constrained computing
(slides)
13:00-14:00 Lunch
14:00-16:00 Session 3 Chair: Vincent Heuveline
14:00-14:45
Robert Schöne (ZIH, TU Dresden, Germany; READEX):
READEX Runtime Exploitation of Application Dynamism for Energy-efficient Computing
(slides)
14:45-15:15
Kashif Nizam Khan (AALTO University, Finland), Sanja Scepanovic, Tapio Niemi, Jukka K. Nurminen, Sebastian Von Alfthan, Olli-Pekka Lehto:
Analyzing the Power Consumption Behavior of a Large Scale Data Center
(slides)
15:15-15:45
Armin Jäger (TU Darmstadt, Germany), Jan-Patrick Lehr, Christian Bischof:
The influence of two modern compiler infrastructures on the energy consumption of the HPCG benchmark
(slides)
16:00-16:30 Coffee Break
16:30-18:00 Session 4 Moderation: Thomas Ludwig
16:30-18:00
Open Discussion:
Current and future trends, chances and challenges in EnA-HPC
18:00 End of Workshop